Module Ival.Widen_Hints.V


module V: sig .. end

type t = Abstract_interp.Int.t 
val pretty : Format.formatter -> t -> unit
val compare : t -> t -> int
val hash : t -> int
module Datatype: Project.Datatype.S  with type t = t
val gt : t -> t -> bool
val le : t -> t -> bool
val ge : t -> t -> bool
val lt : t -> t -> bool
val eq : t -> t -> bool
val add : t -> t -> t
val sub : t -> t -> t
val mul : t -> t -> t
val native_div : t -> t -> t
val rem : t -> t -> t
val pos_div : t -> t -> t
val c_div : t -> t -> t
val c_rem : t -> t -> t
val cast : size:t ->
signed:bool -> value:t -> t
val abs : t -> t
val zero : t
val one : t
val two : t
val four : t
val minus_one : t
val is_zero : t -> bool
val is_one : t -> bool
val equal : t -> t -> bool
val pgcd : t -> t -> t
val ppcm : t -> t -> t
val min : t -> t -> t
val max : t -> t -> t
val length : t -> t -> t
val of_int : int -> t
val of_float : float -> t
val of_int64 : Int64.t -> t
val to_int : t -> int
val to_float : t -> float
val neg : t -> t
val succ : t -> t
val pred : t -> t
val round_up_to_r : min:t ->
r:t -> modu:t -> t
val round_down_to_r : max:t ->
r:t -> modu:t -> t
val pos_rem : t -> t -> t
val shift_left : t -> t -> t
val shift_right : t -> t -> t
val fold : (t -> 'a -> 'a) ->
inf:t ->
sup:t -> step:t -> 'a -> 'a
val logand : t -> t -> t
val logor : t -> t -> t
val logxor : t -> t -> t
val lognot : t -> t
val power_two : int -> t
val two_power : t -> t
val extract_bits : with_alarms:CilE.warn_mode ->
start:t ->
stop:t -> t -> t